Hello, I am Dr. Jayanta Pal

Assistant Professor Department of Information Technology Tripura University (A Central University)

Short Biography

Dr. Jayanta Pal is presently working as Assistant Professor in the Department of Information Technology at Tripura University, Tripura, India. He has completed Ph.D. (Department of Computer Science & Engineering) from the National Institute of Technology Agartala, Tripura, India in 2022. Dr. Pal has acquired B.Tech. (CSE) from Institute of Engineering & Management, Kolkata, India, in 2009, followed by the M.Tech. (CSE) from Tripura University, India, in 2011. Prior to that, he has passed a Diploma in Computer Science & Technology from Polytechnic Institute, Narsingarh, Agartala, India in the year 2006.

Recently Published Thesis

All information about recently published thesis of Dr.Jayanta Pal

Greater cane rat algorithm (GCRA): A nature-inspired metaheuristic for optimization problems

Greater cane rat algorithm (GCRA): A nature-inspired metaheuristic for optimization problems

Author : Agushaka, Jeffrey O., Absalom E. Ezugwu, Apu K. Saha, Jayanta Pal, Laith Abualigah, and Seyedali Mirjalili

Optimization is a ubiquitous process, integral to every human endeavor. It involves finding the most effective combination of constraints or decision variables within a defined boundary to solve a specific problem. The challenge of finding optimal solutions across various domains necessitates the use of optimization methods [1]. As such, there is a common need to develop an optimization algorithm that can handle the complexity of scientific and engineering problems....

Cost-efficient method for inverter reduction and proper placement in quantum-dot cellular automata

Cost-efficient method for inverter reduction and proper placement in quantum-dot cellular automata

Author : A K Pramanik, J Pal, K Mohit, M Goswami and B Sen

The Quantum-dot Cellular Automata (QCA), an emerging technology, is observed to be the most viable solution to current CMOS. It is capable of finding solutions to challenges, like high power consumptionand device density. The elementary logic primitives are the majority gate, inverter and wire. In QCA, two different event cell orientations for the realisation of the inverter are available, where the diagonally oriented structure (DOS) is mostly utilised in logic synthesis.......